Thin-Film Solar Cells

One of the scientific discoveries of the computer semiconductor industry that has shown great potential for the PV industry is thin-film technology. Thin films are exceedingly fine layers of semiconductors placed on top of each other. Thin-film cells can be made from a variety of materials. Today, the most widely used commercial thin-film cells are made from amorphous silicon. Two other materials that are on the verge of commercialization, showing great promise for low-cost production, are polycrystalline copper indium diselenide and cadmium telluride.

Thin-film devices require very little material and have the added advantage of being easy to manufacture. Rather than by growing, slicing, and treating a crystalline ingot, we make them by sequentially depositing thin layers of the required materials.

Several different deposition techniques are available, all of them potentially cheaper than the ingot-growth techniques required for crystalline silicon. These deposition processes can easily be scaled up so that the same technique used to make a 2-inch x 2-inch laboratory cell can be used to make a 2-foot x 5-foot module. The layers can be deposited on various low cost substrates. These can be glass or plastic in virtually any shape-even flexible plastic sheets.

While single-crystal cells have to be individually interconnected into a module, thin-film devices can be made monolithically (as a single unit). Layer upon layer is deposited sequentially on a glass superstrate, from the antireflection coating and conducting oxide, to the semiconductor material, to the back electrical contacts. Individual cells are formed by scoring each layer with a laser beam.

Unlike most singlecrystal cells, the typical thin-film device does not use a metal grid for the electrical contact. Instead, it uses a thin layer of a transparent conducting oxide. These oxides, such as tin oxide, indium tin oxide, and zinc oxide, are highly transparent and conduct electricity very well. They collect the current effectively from the top of the cell, and losses due to resistance are minimal. A separate antireflection coating may be used to top off the device, or the transparent conducting oxide may serve this function as well.

Amorphous Silicon

Amorphous solids, like common glass, are materials in which the atoms are not arranged in any particular order. They do not form crystalline structures at all, and contain large numbers of structural and bonding defects.

It wasn't until 1974 that researchers began to realize that amorphous silicon could be used in PV devices. Before then, the electrical properties of the material were classified as an insulator, and not at all like those of crystalline silicon or similar semiconductor materials.

This perception changed with the discovery that, by properly controlling the conditions under which it is deposited and by carefully modifying its composition, we can use amorphous silicon in PV cells. Today, amorphous silicon is commonly used for solar-powered consumer devices that have low power requirements. Amorphous silicon modules captured a little more than 31 % of the world's solar cell market in 1990.

In recent years, the efficiency of amorphous silicon PV devices has steadily increased; laboratory cells with efficiencies greater than 13% were reported in 1989. Other new thin-film materials have reported much greater efficiencies-such as gallium arsenide cells, with efficiencies of more than 24% in unconcentrated light. But amorphous silicon solar cells, like polycrystalline thin-film devices (see page 32), are uniquely designed for low cost.

Properties of
Amorphous Silicon

Amorphous silicon absorbs solar radiation 40 times more efficiently than does single-crystal silicon. As a result, a film only about 1 micron thick can absorb 90% of the usable solar energy; this is one of the most important factors affecting its potential for low cost. Other principal economic advantages are that amorphous silicon can be produced at a lower temperature and deposited on low-cost substrates.

Amorphous silicon does not have the structural uniformity of crystalline silicon, nor even of polycrystalline silicon. There is a short-range order in the sense that most silicon atoms tend to bond with four other silicon atoms at distances and angles nearly the same as in a crystal. But this uniformity does not translate well among units, resulting in small deviations that destroy the

capability for long-range order. This lack of order results in a high degree of defects such as dangling bonds, where atoms are missing a neighbor to which they can bond. These defects provide places for electrons and holes to recombine. Ordinarily, such a material would be unacceptable for electronic devices because the defects limit the flow of current, in much the same way that grain boundaries interfere with the flow of current in polycrystalline material.

But if amorphous silicon is deposited in such a way that it contains hydrogen (only a 5% to 10% concentration is required), then the hydrogen atoms combine chemically with some of the dangling bonds and remove them. Removing the dangling bonds results in a small but extremely important enhancement of the freedom of movement, or mobility, of electrons and holes in amorphous silicon.

Even with this remedy, electrons and holes are much less mobile in hydrogenated amorphous silicon than in crystalline silicon. Doping makes this already low mobility even worse. Therefore, the design of amorphous silicon PV cells is quite different from the p-n junction design used in crystalline silicon PV cells.

Hydrogenated amorphous silicon cells are designed to have an ultra thin (0.008-micron) and highly doped p+ top layer; a thicker (0.5- to 1-micron) undoped intrinsic (middle) layer; and a very thin (0.02-micron) n+ bottom layer. The top layer is made so thin and relatively transparent that most incident light passes right through it, to generate electron-hole pairs in the undoped intrinsic layer. The top p+ and the bottom n+ layers induce an electric field across the entire intrinsic, or middle, region in a manner similar to the induction of an electric field in the p-n junction of a crystalline silicon PV cell. Since the charge carriers are generated in the intrinsic layer, the poor charge mobility in the doped p+ and n+ layers is less important.

Amorphous silicon has a band-gap energy of about 1.7 eV, which is greater than crystalline silicon's band-gap energy of 1.1 eV. A PV cell's output voltage is directly related to the size of its band gap, so PV cells made of amorphous silicon have higher output voltages than cells made of crystalline silicon. The higher output voltage compensates for the fact that lower-energy photons (with energies below 1.7 eV) are not absorbed by amorphous silicon.

Typically, the construction of a hydrogenated amorphous silicon p-i-n cell begins with the deposition of a p+ layer onto a textured transparent conducting tin-oxide film (the top electrode). This is followed by the intrinsic (i) layer, and a thin n+ layer. The cell is then given a reflective coating on the bottom, usually of aluminum or silver. A textured transparent conducting oxide substrate and a reflector help to trap the maximum possible amount of light in the PV cell.

Glow-discharge deposition has been the method used to make the most efficient amorphous silicon PV cells. In the most common form of this method, a stream of silane (SiH4) and hydrogen gas is passed between a pair of electrodes whose polarity is reversed at high frequency. This reversal of the voltage induces an oscillation of energetic electrons between the electrodes. The electrons collide with the silane, breaking it down into SiH3 and hydrogen. Since SiH3 is chemically a radical, and hence unstable, it adheres to a substrate on one of the electrodes to gain stability. Hydrogen is then released from the substrate, leaving a film of amorphous silicon with about 10% hydrogen. Doping can be accomplished by adding diborane (B2H6) or phosphine (PH3) gas to the silane.

Most commercial amorphous silicon PV modules are produced by this method. The successive layers of the module are formed by moving the substrate sequentially to different electrode stations in separate chambers and depositing the appropriate materials, one at a time. Moving the modules through different chambers minimizes the opportunity for contamination from previous steps. This process uses little energy and is potentially able to produce modules a few square feet in area, on a variety of substrates, and in an assortment of shapes.

Stability Problems and Solutions

After amorphous silicon modules are first exposed to light, their conversion efficiency decreases by 10% to 20%. Thereafter, their performance is relatively steady. Researchers have long studied this light-induced instability. Several explanations have been offered, including tiny microvoids in the amorphous silicon material. Microvoids are atomic-level gaps in the structure several angstroms in diameter (an angstrom is one-ten billionth of a meter). Other causes proposed include oxygen or carbon impurities that are in the cells and ordinary stresses in the system that break silicon-silicon bonds in the region of the imperfections. Researchers have found that devices suffering from degradation can recover their effectiveness if they are annealed at 150°C for a few minutes. Annealing is somewhat effective even at the normal operating temperatures of PV modules, about 50° to 80°C. This is called selfannealing, and it is being looked at by manufacturers of amorphous silicon PV cells.

Polycrystalline Thin-Film Solar Cells

Polycrystalline thin-film cells comprise many tiny crystalline grains of semiconductor materials. The materials used in polycrstalline thin-film cells have properties that are different from those of silicon. For these devices, it has proven to be better to create the electric field with an interface between two different semiconductor materials. This type of interface is called a heterojunction ("hetero" because it is formed from two different materials, in comparison to the "homojunction" formed by two doped layers of the same material, such as the one in silicon solar cells).

The typical polycrystalline thin film has a very thin (less than 0.1 micron) layer on top called the "window" layer. The window layer's role is to absorb light energy from only the high-energy end of the spectrum. It must be thin enough, have a wide enough band gap (2.8 eV or more), and have a low enough absorptivity to let all the available light through the interface (heterojunction) to the absorbing layer. The absorbing layer under the window, usually doped p-type, has to have a high absorptivity for high current and a suitable band gap to provide a good voltage. It is typically 1 to 2 microns thick.

Copper Indium Diselenide

Copper indium diselenide (CuInSe2, or CIS) has an extremely high absorptivity that allows 99% of the available incident light to be absorbed in the first micron of the material. But that is not the only reason that copper indium diselenide is attractive for PV devices. It also has shown very good stability in outdoor tests, an important criterion for commercialization. Recent outdoor tests show no degradation in this material after many hours.

The most common material for the window layer in CIS devices is cadmium sulfide (CdS); sometimes zinc is added to improve the transparency. Adding small amounts of gallium to the absorbing CIS layer boosts the band gap of CIS (from its normal 1.0 eV), which improves the voltage and therefore the efficiency of the device.

The layers of materials in CIS cells can be made by several different processes that were developed in the computer-related thin-film industry. All of these methods are well established commercially in various industries. The CIS layer itself consists of three different elements- copper, indium, and selenium. One of the most popular preparation methods for the CIS layer is evaporation. Small amounts of each of the elements are electrically heated to a point where the atoms vaporize. They then condense on a cooled substrate to form a CIS layer.

Another common method is sputtering. High-energy ions bombard the surface, driving off atoms of the target material. These then condense on a substrate to form a thin layer.

Another technique used successfully to deposit copper indium diselenide on a substrate is spray pyrolysis. In this method, solutions of the salts of the necessary elements are sprayed onto a hot substrate. They react under the elevated temperatures to form the required CIS layer, while the solvent evaporates.

Electrodeposition can also be used to form the CIS layers in the same way gold is plated onto jewelry. Passing electricity through a solution containing ions of the required elements causes them to be deposited out of solution onto an electrode, which acts as the substrate.

CIS layers can also be made by using one of these methods to deposit only the copper and the indium. This is followed by a treatment with hydrogen selenide gas (called selenization) to add the selenium. This approach is considered the most likely to lead to commercial CIS products.

Laboratory cells of CIS recently exceeded 14% efficiency One-square-foot submodules achieved an efficiency above 11 %, generating more than 10 W of power. A 1-foot x 4-foot module reached 9% efficiency, generating 36 W. At least one major company expects to commercialize CIS soon.

Cadmium Telluride

The other prominent polycrystalline thin-film material is cadmium telluride (CdTe). With a nearly ideal band gap of 1.44 eV, cadmium telluride also has a very high absorptivity. Although cadmium telluride is most often used in PV devices without being alloyed, it is easily alloyed with zinc, mercury, and some other elements to vary its properties. Cadmium telluride films can be manufactured by the same low-cost techniques used to make CIS films, especially electrodeposition and spraying.

Like CIS, the best CdTe cells employ a heterojunction interface, with cadmium sulfide acting as a thin window layer. Tin-oxide is used as a transparent conducting oxide and an antireflection coating.

Though CIS can easily be prepared p-type, cadmium telluride is not so well behaved. P-type CdTe films tend to be highly resistive electrically, which leads to large internal losses. It has been difficult to make a stable back electrical contact, because a rust-like deterioration develops there. Two approaches have been successful in circumventing this problem. One approach is to avoid trying to dope the CdTe layer p-type. The CdTe layer is instead allowed to be intrinsic (natural, neither p-type nor n-type). Then, a layer of p-type zinc telluride (ZnTe) is sandwiched between the cadmium telluride and the back electrical contact. Even though then-type cadmium sulfide and the p-type zinc telluride are separated, they still form an electrical field that extends right through the intrinsic cadmium telluride. Cells employing this design have been tested for more than 3,000 hours and have shown no degradation.

One company using the more conventional p-type CdTe cell structure has also developed new CdTe contacts that appear to be stable if properly protected from water vapor and oxygen. To achieve this, the firm is developing a hermetically sealed module.

By 1989 the highest efficiencies measured for laboratory CdTe cells were greater than 12%, and for modules, greater than 7%. Some companies plan to deliver commercial modules of CdTe soon.

©2002 Sandia National Laboratories|Site Contact|Privacy and Security|PV Disclaimer | Contact Us